apex microtechnology corporation ? telephone (520) 690-8600 ? fax (520) 888-3329 ? orders (520) 690-8601 ? email prodlit@apexmicrotech.com 1 introduction the EK22 evaluation kit is designed to provide a convenient way to breadboard design ideas for the sa56 pwm amplifers. the eval25 evaluation board is pre-wired for all required and recommended external components. the eval25 also includes a breadboard area for constructing your application circuit including provisions for an output flter. please refer to applications note 32 in the apex catalog for guidance in flter component selection. the 1f ceramic capacitors supplied with the kit are for high frequency bypassing of the vs and vdd supplies (c1 C c3 on the eval25 board). an additional user supplied low esr capacitor of at least 10uf per amp of output current is required for adequate bypass of the vs supply (c4 on the eval25 board). please refer to applica - tions note 30 for help with power supply bypassing and other useful information. sa56 prototype beta samples this evaluation kit is supplied for evaluation of sa56 pro - totype beta samples. there are some limitations to the sa56 prototypes that must be noted. suggestions to minimize the effect of these limitations are included. the sa56 combines both high speed high power switching and low level analog signals on a single silicon chip. the dif - fculty in achieving clean noise free operation is much greater then that of discrete or hybrid microcircuit designs. though much care and attention has been given to these considerations in the design and layout of the sa56, there is still some work to be done and these prototypes do not switch as cleanly as necessary for completely trouble free operation. grounding for the sa56 is critical. the eval25 board has separate ground paths for signal ground (sgnd) and power ground (pgnd). the signal and power grounds are common at one point on the sa56. ground loops can be formed if these two grounds are tied together externally. these two grounds are not tied together on the eval25 board through trace rout - ing. when building your evaluation circuit, insure that each component referenced to ground is tied to the proper ground path. external components at the high speed, high current output of the sa56 must be returned to pgnd. analog mode operation of the sa56 prototype is affected by switching noise through non-linear operation towards the pwm duty cycle extremes. this limits the useable duty cycle range of the sa56 prototype. the use of external fyback diodes and the use of rc snubbers from each output to ground reduces switching noise, increasing the usable duty cycle range. however the duty cycle should be limited within the range of 5% to 95%. this kit is supplied with four schottky diodes, p/n sb5100, for use as external fyback diodes (d1 C d4). it is recom - mended that diodes d1 C d4 be used regardless of the mode of operation. in addition four 20 ohm, 5w resistors, and two 15nf, 100v capacitors are supplied for use as an rc snubber for each output (c9, r3a, r3b and c10, r4a, r4b). the snubbers are especially useful in reducing the noise generated by the high dv/dt during output switching. the power dissipated in the snubber components can be estimated by; ) 5 5 1 8 8 8 " 1 & 9 . * $ 3 0 5 & $ ) $ 0 .
" 1 & 9
. * $ 3 0 5 & $ ) / 0 - 0 ( : & 7 " - 6 " 5 * 0 / , * 5 ' 0 3 4 " & 9 & , p = v 2 * c * fsw where: p is the power dissipated v is the vs supply voltage c is the snubber capacitor value (15nf) fsw is the switching frequency. it also is recommended that a low pass rc flter be included on the pwm_in line for analog mode operation (r2 and c8). a 100 ohm resistor and 2.7nf capacitor worked well for r2 and c8 value during design verifcation testing. however these may not be the best choice for switching frequency and load confgurations other then that used during design verifcation testing. it is up to the user to determine the best values to use for a given application. start-up faults of the sa56 protection circuits due to noise generated by high current transient pulses at start-up may occur. the sa56 has an internal start-up reset pulse to handle these transients, but the duration of these transients is often longer then the reset pulse. these transient current pulses will trip the short circuit and over current protection if a high current output is commanded at start-up. it is best if the sa56 can be started up with low output current demand. examples are starting with the pwm input at mid-range in analog mode, or starting with reduced vs supply voltage. if a soft start is not practical, a start-up reset pulse can be generated on the eval25 board with a few external compo - nents. figure 1 is an example of this reset pulse generator. when vdd is applied, the disable pin will be pulled high by capacitor c11 until c11 is discharged by r1. this generates a reset pulse on the disable pin. after the reset pulse is dis - charged, r1 holds disable at logic low for normal operation. the time constant of c11 and r1 must be a couple of milliseconds longer then the rise time of the vdd supply. a good choice for r1 is 10k - 20k ohms. the vs supply must be turned on before the vdd supply. figure 1. start-up reset 7 3 & ' 1 8 . ' " 6 - 5 % * 3 % * 4 " # - & 5 - * . 4 $ j o 4 ( / % 7 t # 0 6 5 1 ( / % 6 d d # 2 3 ! 4 ( / %
apex microtechnology corporation ? 5980 north shannon road ? tucson, arizona 85741 ? usa ? applications hotline: 1 (800) 546-2739 2 absolute maximum ratings specifications EK22 it also maybe necessary to bypass the scin line with a 22pf - 50pf ceramic capacitor. this bypass capacitor will add a time delay to the short circuit protection. however this additional time delay has not resulted in failure during design verifcation testing of the short circuit protection. the short circuit protection may be disabled entirely by grounding the scin pin to sgnd. cycle by cycle current limiting will still be active if a current limit resistor is connected from isen to sgnd. please refer to the sa56 data sheet for selection of the current limit resistor. the sa56 prototypes have an extended blocking period in the isen output. this blocking period can be several hun - dreds of nano-seconds. this is a limitation of this feature for the sa56 prototypes that will be corrected in the production sa56 when released. in 2 quadrant mode of operation, one half bridge of the sa56 is held low while the other half bridge is modulated. this means that no current is sensed at the isen pin during the low portion of the output modulation. the isen output is not useful for confguring a transconductance amplifer in 2 quadrant operation. before you get started ? all apex amplifers should be handled using proper esd precautions. ? do not change connections while the circuit is powered. ? initially set all power supplies to the minimum operating voltage allowed in the device data sheet. ? the power supply turn on sequence for the sa56 is vs supply on frst followed by the vdd supply. if vdd is turned on before vs, the sa56 will start up in a fault condition that can not be reset until vs is greater then 12v. parts list -- ref. apex p/n description/vendor qty. na hs20 heat sink 1 na ms11 strip of 30 cage jacks 1 na eval25 pc board 1 bj1-12 bj1 banana jack/ 12 deltron 571-0100 bn1, 2 146510cj bnc, pcb mount r/a 2 jameco 146510cj c1-3 ox7r105kwn 1 f cap 3 novacap 1825b105k201n c9, 10 c062k153k1x5ca 15 nf cap 2 d1-4 sb5100 diode, 100v, 5a 4 r3a-4b 286-20 resistor, 20 ohm, 5w 4 tb1 ptc07daan header 2x7 pin 1 j1-3 stc02syan jumper, shorting 3 na tw12 thermal washer 1 box figure 2 shematic
apex microtechnology corporation ? telephone (520) 690-8600 ? fax (520) 888-3329 ? orders (520) 690-8601 ? email prodlit@apexmicrotech.com 3 typical performance EK22 $ 0 . 1 0 / & / 5 4 * % & $ * 3 $ 6 * 5 4 * % & figure 3 pcb
apex microtechnology corporation ? 5980 north shannon road ? tucson, arizona 85741 ? usa ? applications hotline: 1 (800) 546-2739 4 EK22 operating consideratons assembly during assembly, refer to figure 2, 3 and the sa56 data sheet. 1. note that each side of the circuit board is identifed as either the component side or bottom side. the component side is labeled on the silk screen side of the board. 2. cut the ms11 into strips of 12 and 11. discard the remain - ing small strip. insert the two strips into the two rows of holes for the dut from the component side of the pcb. from the bottom side, solder all cage jacks to the circuit board pads. be sure that the cage jacks are fully seated before soldering. be careful that the solder does not fow into the cage jack. remove the plastic carrier strips. 3. solder the surface mount capacitors at c1 C c3, on the component side of the pcb. the carrier strips removed from the cage jacks in step 2 are convenient as a tool to hold the capacitors in place while soldering. the carrier strips can be discarded when no longer needed for this purpose. though not required, it is a good idea to fll in the vias on the pgnd side of c2 and c3 with solder. 4. from the component side, insert the 4 diodes d1 C d4 into the pcb at the locations marked on the board. solder the diodes to the pcb from the bottom side. 5. insert the 14 pin header tb1 into the pcb from the component side. solder tb1 from the bottom side. install shorting jumpers j1 C j3 on tb1 to confgure the mode of operation for the sa56. refer to the schematic in fgure 2 for jumper positions. the top pair of pins in the schematic diagram for tb1 correspond to the left most pair of pins when tb1 is viewed on the pcb in fgure 3. 6. mount the banana jacks and the bnc connectors to the pcb at locations marked on the pcb as needed or as desired. solder these from the bottom side of the board. 7. mount an electrolytic bypass capacitor (not supplied) at c4 from the component side of the pcb. match the polarity markings on the pcb. solder the capacitor to the pcb from the bottom side. 8. the sa56 will not function with the isen pin open. select a resistor value and install on the component side of the pcb between isen and sgnd at the r5 position marked on the pcb. solder from the bottom side. if a current limit resistor is not used, short the isen pads to sgnd in place of r5. 9. it is recommended that a 10k to 20k pull down resistor be installed between the disable line and sgnd at the loca - tion labeled r1. for reliable start-up it is recommended to include a capacitor and diode to vdd as shown in fgure 1. 10. for analog mode operation, a pwm timing capacitor is required. refer to the sa56 datasheet for timing capaci - tor calculation. install the timing capacitor in the c7 loca - tion. 11. install the snubber components c9, r3a, r3b and c10, r4a, r4b at the locations labeled on the pcb. 12. if the prototype sa56 will be used in an analog application it is recommended to include an input rc flter in series with the pwm_in input (r2 and c8). the pwm_in bnc connector is not routed to the dut unless a resistor or a shorting wire is installed at the r2 location. 13. mount other components to complete your application circuit, using the pads and holes provided. trim all excess leads. 14. the pcb has provisions for a 2 pole output flter. the loca - tions for the inductors l1 and l2 are designed to accept a wide range of sizes for either a through hole or surface mount style of inductor. j.w. miller series 6700 through hole inductors or series pm2110 surface mount inductors will ft in these locations and include a wide range of induc - tors suitable for many sa56 applications. these inductors are readily available from digikey corp. 15. partially insert the sa56 device into the cage jacks from the component side of the pcb. 16. install the hs20 on the component side of the board, securing the hs20 to the board with two 6-32 self tap - ping screws (not supplied) through the elongated holes in the pcb from the bottom side. place a tw12 thermal washer between the dvt and heatsink. align the holes in the tw12 to the mounting holes of the dut. 17. mount the device to the heat sink with a 4-40 x 1/4 screw. make the screw snug but do not over tighten as this pro - vides no beneft and may break the screw. 18. hook up power and signals as necessary. the amplifer is now ready for testing.
apex microtechnology corporation ? telephone (520) 690-8600 ? fax (520) 888-3329 ? orders (520) 690-8601 ? email prodlit@apexmicrotech.com 5 operating consideratons EK22 this data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. all specifcations are subject to change without notice. EK22u rev b march 2006 ? 2006 apex microtechnology corp.
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